Guide to SIS function blocks

Analog Input (LSAI)

All

Accesses a single analog measurement value and status from an I/O input. The input value is a transmitter's 4 to 20 mA signal. The block supports linearization, signal scaling, signal filtering, signal status propagation, and simulation.

Digital Valve Controller (LSDVC)

All

Drives a HART Two-state Output channel or CHARM connected to a digital valve controller. The block supports partial stroke testing, fault state detection, and field device confirmation.

Discrete Input (LSDI)

All

Accesses a single discrete measurement value and status from a two-state field device and makes the processed physical input available to other function blocks. The block supports signal inversion, signal filtering, signal status propagation, and simulation.

Discrete Output (LSDO)

All

Takes a discrete input value representing the commanded output state and writes it to a specified Discrete Output channel or CHARM. The block supports fault state detection and field device confirmation.

Calculation/Logic (LSCALC)

All

Allows you to specify an expression that determines the block's output. Mathematical functions, logical operators, constants and parameter references can be used in the expression.

Comparator (LSCMP)

All

Compares two values and sets a Boolean output based on that comparison.

Limit (LSLIM)

All

Limits an input value between two reference values. The block has options that set the output to a default value or the last value if the input becomes out of range.

Middle Signal Select (LSMID)

All

Selects between multiple analog signals. The block selects the mid-valued input from the inputs that are are not disabled and do not have Bad status. If there is an even number of inputs, the average of the two middle valued inputs is used as the middle value.

Off-delay Timer (LSOFFD)

All

Delays the transfer of a False (0) discrete input value to the output by a specified time period. The block supports signal status propagation.

On-delay Timer (LSOND)

All

Delays the transfer of a True (1) discrete input value to the output by a specified time period. The block supports signal status propagation.

Retentive Timer (LSRET)

All

Generates a True (1) discrete output after the input has been True for a specified time period. The elapsed time the input has been True and the output value are reset when the reset input is set True.

Timed Pulse (LSTP)

All

Generates a True (1) discrete output for a specified time duration when the input makes a positive (False-to-True) transition. The output remains True even when the input returns to its initial discrete value and returns to its original False value only when the output is True longer than the specified time duration.

Alarm (LSALM)

All

Performs alarm detection on a user-specified input. The parameters generated can then be used to generate alarm events at the user interface.

Bi-directional Edge Trigger(LSBDE)

All

Generates a True (1) discrete pulse output when the discrete input makes a positive (False-to-True) or negative (True-to-False) transition since the last execution of the block. The block supports signal status propagation.

Boolean Fan In (LSBFI)

All

Generates a discrete output based on the weighted binary sum, binary coded decimal (BCD) representation, or logical OR of one to sixteen discrete inputs. The block supports signal status propagation.

Boolean Fan Out (LSBFO)

All

Decodes a binary weighted input to individual bits and generates a discrete output value for each bit (as many as sixteen outputs). The block supports signal status propagation.

And (LSAND)

All

Generates a discrete output value based on the logical AND of two to sixteen discrete inputs. The block supports signal status propagation.

Not And (LSNAND)

All

Generates a discrete output value based on the logical AND of two to sixteen discrete inputs, then performs a NOT on the result. The block supports signal status propagation. 

Not Or (LSNOR)

All

Generates a discrete output value based on the logical OR of two to sixteen discrete inputs, then performs a NOT on the result. The block supports signal status propagation. 

Not (LSNOT)

All

Logically inverts a discrete input signal and generates a discrete output value. The block supports signal status propagation.

Or (LSOR)

All

Generates a discrete output value based on the logical OR of two to sixteen discrete inputs. The block supports signal status propagation.

Not Exclusive OR (LSXNOR)

All

Performs a NOT on the exclusive OR of two inputs.

Exclusive OR (LSXOR)

All

Performs an exclusive OR of two inputs to produce an output.

Negative Edge Trigger (LSNDE)

All

Generates a True (1) discrete pulse output when the discrete input makes a negative (True-to-False) transition since the last execution of the block. The block supports signal status propagation.

Positive Edge Trigger (LSPDE)

All

Generates a True (1) discrete pulse output when the discrete input makes a positive (False-to-True) transition since the last execution of the block. The block supports signal status propagation.

Reset/Set Flip-flop (LSRS)

All

Generates a discrete output value based on NOR logic of reset and set inputs.

Set/Reset Flip-flop (LSSR)

All

Generates a discrete output value based on NAND logic of set and reset inputs.

Analog Voter (LSAVTR)

All

Monitors a number of input values and determines if there are enough votes to trip. If a configured number of the inputs vote to trip, the block trips and sets the output of the block to 0 (zero).

Cause & Effect Matrix (LSCEM)

All

Defines interlock and permissive logic that associates as many as 16 inputs and 16 outputs. Configure one or more inputs to trip each output. When an input becomes active, all outputs associated with that input trip.

Discrete Voter (LSDVTR)

All

Monitors a number of input values and determines if there are enough votes to trip. If a configured number of the inputs vote to trip, the block trips and sets the output of the block to 0 (zero).

Effect (LSEFFECT)

CSLS major revision 2 or later

Defines interlock and permissive logic when used in combination with logic solver monitor blocks, voter blocks or input blocks.

Monitor (LSMON)

CSLS major revision 2 or later

Generates Boolean outputs based on the states of Boolean inputs. Typically, the LSMON block provides inputs to an LSEFFECT block or to another LSMON block.

State Transition Diagram (LSSTD)

All

Implements a user-defined state machine. The state machine describes the possible states, and the transitions between those states, that can occur.

Step Sequencer (LSSEQ) 

All

Associates system states with actions to drive outputs based on the current state.