SIS function blocks > SIS Math Blocks > Logic Solver Calculation function block > Expressions in DeltaV SIS Software

Syntax Rules in Logic Solver Expressions

An expression is made up of operands, constants, operators, functions, comments.

Each expression must follow a specific syntax to be valid. The Expression Editor validates the expression when parsing.

The Option Explicit behavior is enforced even if the statement is not present in the expression, requiring declaration of temporary variables. 

References (Inputs, Outputs, and Other Module Parameters)

The Logic Solver subset of expressions supports only references to the inputs and outputs of the Logic Solver Calc/Logic block and to other module/block parameters within the same module. External and dynamic references are not supported.

If you do not specify the field, CV is assumed.

Relative Notation

The notation rules for referencing parameters within and outside of the LSCALC block are shown in the following table.

Note

INn and OUTn parameters do not require the quotes.

Notation

Used to

'PARAM.FIELD'

Reference a parameter in this LSCALC block

'^/PARAM.FIELD'

Reference a module-level parameter

'^/BLOCK/PARAM.FIELD'

Reference a parameter in another block. This block must be in the same module as the LSCALC block.

Note

If you do not specify the field, CV is assumed.

 Statements for Expressions in the Logic Solver

The following statement types are allowed in Logic Solver Calc/Logic expressions. Statements are separated by semicolons.

Statement Type

Examples

Assignment

OUT1 := ABS(IN1);
'OUT2' := '^/BLOCK1/PARAM1';

If Then Else

IF IN1 = 1 THEN
   OUT1 := 1;
ELSE
   OUT1 := 0;
ENDIF;

Explicit declaration of temporary variables using VAR...END_VAR

Option Explicit; (* optional *)
VAR
   TEMP1;
   TEMP2;
END_VAR;

Comment (*  *)

(* some comment *)

Comment (REM)

REM some comment

Assignment Statements

The assignment (:=) statement allows the assignment of an expression to a reference, a temporary variable or an output to locations inside and outside of the current block.

Syntax

'reference' := expression; (* only references to 'OUTx' and local module parameters are possible *)

or

tempvar := expression;

or

OUTn := expression;

The assignment (:=) statement syntax has these parts:

Part

Description

Reference

or

tempvar

or

output

Required one of either reference, tempvar or output.

Expression

Required. Any valid expression.

If...Then...Else...End_If

The IF-THEN-ELSE-END_IF structure allows you to execute conditional code in expressions. When a block tests a condition that evaluates to TRUE, it executes the set of statements after THEN. If the condition evaluates to FALSE, it executes the set of statements after ELSE.  If the condition evaluates to FALSE, and there is no ELSE, then the IF-THEN-ELSE-END_IF structure takes no action.

Syntax

If condition Then [statements]
  [Else [elsestatements]]
End_If

The IF-THEN-ELSE-END_IF statement syntax has the following parts:

Part

Description

Condition

Required. An expression that evaluates to True or False.

Statements

Required. One or more statements separated by semi-colons; executed if condition is True.

Elsestatements

Optional - but required if keyword ELSE is used. One or more statements separated by semi-colons; executed if condition is False.

Note

Although the Structured Text Language requires the use of END_IF (with underscore). However, for your convenience, the DeltaV software allows you to use either END_IF or ENDIF.