The Reset/Set Flip-flop (RS) function block generates a discrete output value based on NOR logic of reset and set inputs:
If the reset input is False (0) and the set input is True (1), the output is True. The output remains True, regardless of the set value, until the reset value is True. When reset becomes True, the output is False.
When both inputs are True, the output is False.
When both inputs become False, the output remains at its last state and can be either True or False.
There are no modes or alarm detection in the block.
RESET_IN is the reset discrete input value and status.
SET is the set discrete input value and status.
OUT_D is the discrete output value and status.
The following figure shows the internal components of the Reset/Set Flip-flop function block: