The Set/Reset Flip-flop (SR) function block generates a discrete output value based on NAND logic of set and reset inputs:
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When the reset input is False (0) and the set input is True (1), the output is True. The output remains True until the reset input is True and the set input is False.
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When the reset input is True, the output is equal to the set input.
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When both inputs are True, the output is True.
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When both inputs become False, the output remains at its last state and can be either True or False.
There are no modes or alarm detection in the block.
RESET_IN is the reset discrete input value and status.
SET is the set discrete input value and status.
OUT_D is the discrete output signal and status.
The following figure shows the internal components of the Set/Reset Flip-flop function block:
