|
ABNORM_ACTIVE
|
None
|
Indicates that:
- a block error
condition not selected in BAD_MASK (on the function block level) is True
(Active), or
- an error condition
(at the module level) not selected in MERROR_MASK is True (Active), or
- a module status
not selected in MSTATUS_MASK is True (Active).
|
|
ALGO_OPTS
|
None
|
When
AbortOnReadErrors is selected, the expression algorithm
aborts after a read error. When the expression aborts, the value and status of
F_OUT_D_n, F_PRE_OUT_Dn, I_OUT_D_n, I_PRE_OUT_Dn,
P_OUT_D_n, and P_PRE_OUT_Dn remain unchanged.
The
Permit option changes the interpretation of the
expression result for permissive conditions.
- If
Permit is selected, write the expression such that a
True evaluation means permit.
- If Permit is
not
selected, write the expression such that a True
evaluation means prevent.
|
|
ARM_TRAP
|
None
|
When this parameter is non-zero the first out trap mechanism
for interlocks is enabled.
|
|
BAD_ACTIVE
|
None
|
Indicates that:
- a block error
condition selected in BAD_MASK (at the function block level) is True (Active),
or
- an error condition
(at the module level) selected in MERROR_MASK is True (Active), or
- a module status
selected in MSTATUS_MASK is True (Active).
|
|
BAD_MASK
|
None
|
The set of active user-selected error conditions that
triggers a Bad block status. Select block error (BLOCK_ERR) conditions in the
BAD_MASK parameter. When any of these conditions are True, the BAD_ACTIVE
parameter becomes True. When any of the BLOCK_ERR conditions that are not
included in BAD_MASK are True, ABNORM_ACTIVE becomes True.
|
|
BLOCK_ERR
|
None
|
The summary of active error conditions associated with the
block. The block error for the DCC block is:
- Configuration
Error - The expression is empty
|
|
CMD_IN_D
|
None
|
Indicates the command from the downstream EDC block,
including the passive state information. Use CMD_IN_D to latch the interlock
condition and trap the first interlock condition and to reset the first
interlock indication.
|
|
DISABLE_ACT
|
None
|
The output value that represents the logical OR of
I_DISABLE_ACT, P_DISABLE_ACT, and F_DISABLE_ACT.
|
|
F_DELAY_ONn
(n = 1 through 8)
|
Seconds
|
This parameter is the configured time (in seconds) before
F_PRE_OUT_Dn becomes True after the force setpoint condition
n is True. If the force setpoint condition
n clears before the delay time is reached,
F_PRE_OUT_Dn eter remains False and the timer resets. Every time the
force setpoint condition
n clears, the timer resets.
|
|
F_DESCn
(n = 1 through 8)
|
None
|
User-specified description of the force setpoint conditions.
|
|
F_DISABLEn
(n = 1 through 8)
|
None
|
Enables/disables the force setpoint conditions (True =
disable, False = enable).
|
|
F_DISABLE_ACT
|
None
|
The logical OR of the F_DISABLEn parameters.
|
|
F_ERROR_OPT
|
None
|
Specifies how the block force setpoint logic behaves when a
read error occurs. The value of F_PRE_OUT_Dn is False, True, or the last
value prior to the read error as defined in F_ERROR_OPT (unless
Abort on Read Errors is selected in ALGO_OPTS, in which
case F_ERROR_OPT does not apply). The status of F_PRE_OUT_Dn is
BadNoComm when a read error occurs.
|
|
F_EXPn
(n = 1 through 8)
|
None
|
The configurable expression
n that when it evaluates True, the force setpoint
condition is active.
|
|
F_OUT
|
None
|
The named state (F_STATEn) of the force setpoint
condition (F_OUT_D_n = True) becoming active that has the smallest
condition number of the force setpoint conditions becoming active.
F_OUT is updated only when a force setpoint condition becomes
active. When there is no force setpoint condition active, F_OUT holds its last
value.
When all force setpoints clear, F_OUT retains its last value.
|
|
F_OUT_D
|
None
|
The pulsed output value that represents the logical positive
edge detection of the F_OUT_D_n parameters.
|
|
F_OUT_D_n
(n = 1 through 8)
|
None
|
The internal value copied from F_PRE_OUT_Dn when force
setpoint condition
n is not disabled.
When force setpoint condition
n is disabled, F_OUT_D_n is False.
|
|
F_OUT_INT
|
None
|
The unsigned 32-bit binary weighted output value that
represents the bit combination of the F_OUT_D_n parameters.
|
|
F_PRE_OUT_Dn
(n = 1 through 8)
|
None
|
The internal value set when F_EXPn evaluates to True
for a period longer than F_DELAY_ONn. F_PRE_OUT_Dn ignores the
F_DISABLEn value.
|
|
F_STATEn
(n = 1 through 8)
|
None
|
Named state of condition
n when this condition is True. The named state is the
setpoint the condition is forced to when this parameter is True.
The named states from 0 to 5 correspond to the 6 setpoints of
the Enhanced Device Control (EDC) block.
The named state 255 is interpreted by the EDC block as the
setpoint defined as the Passive setpoint in the EDC block.
|
|
F_TIMERn
(n = 1 through 8)
|
Seconds
|
The elapsed time since the force setpoint condition
n transitioned to True.
F_TIMERn resets when F_PRE_OUT_Dn transitions
to False.
|
|
F_USED_CND
|
None
|
The number of force setpoint conditions that are evaluated by
the force setpoint logic.
F_USED_CND can take any value between 0 and and the number of
force setpoint conditions configured (maximum of 8).
|
|
I_DELAY_OFFn
(n = 1 through 16)
|
Seconds
|
This parameter sets the time (in seconds) befoe
I_PRE_OUT_Dn becomes False after the interlock condition
n clears. If the interlock condition
n reoccurs before the delay time is reached,
I_PRE_OUT_Dn remains True and the timer resets. Every time the interlock
condition
n is detected, the timer resets.
|
|
I_DELAY_ONn
(n = 1 through 16)
|
Seconds
|
This parameter sets the time (in seconds) before
I_PRE_OUT_Dn becomes True after the interlock condition
n is True. If the interlock condition
n clears before the delay time is reached,
I_PRE_OUT_Dn remains False and the timer resets. Every time the
interlock condition
n clears, the timer resets.
|
|
I_DESC
|
None
|
The I_DESC_n parameter of the first active interlock
condition where I_L_OUT_Dn is True when the trap occurs .
|
|
I_DESC_n
(n = 1 through 16)
|
None
|
User-specified description of the interlock conditions.
|
|
I_DISABLEn
(n = 1 through 8)
|
None
|
Enables/disables the interlock conditions (True = disable,
False = enable).
|
|
I_DISABLE_ACT
|
None
|
The logical OR of the I_DISABLEn parameters.
|
|
I_ERROR_OPT
|
None
|
Specifies how the block interlock logic behaves when a read
error occurs. The block sets I_PRE_OUT_Dn to False, True, or the last
value prior to the read error as defined in I_ERROR_OPT (unless
Abort on Read Errors is set in ALGO_OPTS, in which case
I_ERROR_OPT does not apply). The status of I_PRE_OUT_Dn is BadNoComm
when a read error occurs.
|
|
I_EXPn
(n = 1 through 16)
|
None
|
When I_EXPn evaluates True, the interlock condition is
active.
|
|
I_FIRST_OUT
|
None
|
The bit value of the highest priority condition (lowest
condition number) that is currently active. If another condition that has a
different interlock state (I_STATEn) and a higher priority becomes
active, I_FIRST_OUT changes to the bit value of the newly active condition.
When CMD_IN_D status is bad, the I_FIRST_OUT trap occurs
immediately when the condition becomes True and ARM_TRAP is True.
|
|
I_HIGHER_MNGn
(n = 1 through 16)
|
None
|
Enables/disables the ability to disable an interlock
condition. When True, I_DISABLEn has no effect on I_OUT_D_n.
|
|
I_L_OUT_Dn
(n = 1 through 16)
|
None
|
The latched value of I_OUT_D_n when
I_RESET_REQD_n is True and CMD_IN_D is different than I_OUT when
CMD_IN_D status is not bad.
When I_RESET_REQD_n is False, I_L_OUT_Dn is a
copy of I_OUT_D_n.
|
|
I_OUT
|
None
|
The named state equal to the I_STATEn parameter value
associated with the active or latched interlock condition (I_OUT_D_n or
I_L_OUT_Dn = True) having the smallest condition number.
I_OUT is Passive state (value 255) when I_OUT_INT is zero
(all conditions clear).
|
|
I_OUT_D
|
None
|
The logical NOR of the I_OUT_D_n or I_L_OUT_Dn
parameters.
|
|
I_OUT_D_n
(n = 1 through 16)
|
None
|
The internal value copied from I_PRE_OUT_Dn when the
interlock condition
n is not disabled.
When the interlock condition
n is disabled, I_OUT_D_n is False.
|
|
I_OUT_INT
|
None
|
The unsigned 32-bit binary weighted output value that
represents the bit combination of the I_OUT_D_n or I_L_OUT_Dn
parameters.
|
|
I_PRE_OUT_Dn
(n = 1 through 16)
|
None
|
The internal value set when the interlock expression
evaluates to True for a period longer than I_DELAY_ONn.
I_PRE_OUT_Dn ignores the I_DISABLEn value.
|
|
I_RESET_REQD
|
None
|
When True, it indicates that an active interlock condition no
longer exists (all I_OUT_D_n are False), but that the block has to be
reset to clear the interlock output (I_OUT_D = False).
I_RESET_REQD is False when there are no active or latched
conditions.
|
|
I_RESET_REQD_n
(n = 1 through 16)
|
None
|
Enables the latching of I_OUT_D_n when True.
When I_L_OUT_Dn is latched, a reset is required to
unlatch it when I_OUT_D_n is False. A reset is required to prevent the
I_OUT_D parameter to return to False without an action to acknowledge that an
active interlock condition was present.
|
|
I_STATEn
(n = 1 through 16)
|
None
|
Named state associated with condition
n that indicates the state to interlock when this
condition is True.
The named states from 0 to 5 correspond to the 6 states of
the EDC block.
The named state 255 is interpreted by the EDC block as the
Passive State in the EDC.
|
|
I_TIMERn
(n = 1 through 16)
|
Seconds
|
The behavior of I_TIMER n depends on the value of
I_DELAY_OFF n:
- If
I_DELAY_OFFn is 0 (zero), I_TIMERn is the elapsed time since
condition
n transitioned to True. I_TIMERn resets when
I_PRE_OUT_Dn transitions to False.
- If
I_DELAY_OFFn is non-zero, I_TIMERn is the elapsed time since
condition
n transitioned to False. I_TIMERn resets when
I_PRE_OUT_Dn transitions to True.
|
|
I_USED_CND
|
None
|
Indicates the number of interlock conditions which are
evaluated by the interlock logic.
I_USED_CND can take any value between 0 and the number of
interlock conditions configured.
|
|
P_DELAY_OFFn
(n = 1 through 8)
|
Seconds
|
The time (in seconds) before P_PRE_OUT_Dn becomes
False after permissive condition
n clears. If permissive condition
n reoccurs before the delay time is reached,
P_PRE_OUT_Dn remains True and the timer resets. Every time the
permissive condition
n is detected, the timer resets.
|
|
P_DELAY_ONn
(n = 1 through 8)
|
Seconds
|
The time (in seconds) before P_PRE_OUT_Dn becomes True
after permissive condition
n is True. If permissive condition
n clears before the delay time is reached, the
P_PRE_OUT_Dn remains false and the timer resets. Every time the
permissive condition
n clears, the timer resets.
|
|
P_DESCn
(n = 1 through 8)
|
None
|
User-specified descriptions of the permissive conditions.
|
|
P_DISABLEn
(n = 1 through 8)
|
None
|
Enables/disables the permissive conditions (True = disable,
False = enable).
|
|
P_DISABLE_ACT
|
None
|
The logical OR of the P_DISABLEn parameters.
|
|
P_ERROR_OPT
|
None
|
Specifies how the block permissive logic behaves when a read
error occurs. The value of P_PRE_OUT_Dn is False, True, or the last
value prior to the read error as defined in P_ERROR_OPT (unless
Abort on Read Errors is set in ALGO_OPTS, in which case
P_ERROR_OPT does not apply). The status of P_PRE_OUT_Dn is BadNoComm
when a read error occurs.
|
|
P_EXPn
(n = 1 through 8)
|
None
|
When the configurable expressionn evaluates True, the
permissive condition is active.
|
|
P_OUT_D
|
None
|
The logical AND of I_OUT_D and the logical NOR of the
P_OUT_D_n parameters.
|
|
P_OUT_D_n
(n = 1 through 8)
|
None
|
The internal value copied from P_PRE_OUT_Dn when the
permissive condition
n is not disabled.
When the permissive condition
n is disabled, P_OUT_D_n is False.
|
|
P_OUT_INT
|
None
|
The unsigned 32-bit binary weighted output value that
represents the bit combination of the P_OUT_D_n parameters.
|
|
P_PRE_OUT_Dn
(n = 1 through 8)
|
None
|
The internal value set when the permissive expression
evaluates to True for a period longer than P_DELAY_ONn.
P_PRE_OUT_Dn ignores the P_DISABLEn value.
|
|
P_TIMERn
(n = 1 through 8)
|
Seconds
|
The behavior of P_TIMER n depends on the value of
P_DELAY_OFF n:
- If
P_DELAY_OFFn is 0 (zero), P_TIMERn is the elapsed time since
condition
n transitioned to True. P_TIMERn resets when
P_PRE_OUT_Dn transitions to False.
- If
P_DELAY_OFFn is non-zero, P_TIMERn is the elapsed time since
condition
n transitioned to False. P_TIMERn resets when
P_PRE_OUT_Dn transitions to True.
|
|
P_USED_CND
|
None
|
The number of permissive conditions which are evaluated by
the permissive logic.
P_USED_CND can take any value between 0 and the number of
permissive conditions configured.
|
|
RESET_D
|
None
|
When transitioning from zero to non-zero, RESET_D
- clears
I_FIRST_OUT, and
- unlatches the
I_L_OUT_Dn parameters that are True and for which the
I_RESET_REQD_n parameters are True and the I_OUT_D_n parameters
are False.
The block sets RESET_D back to zero at the end of each scan.
RESET_D does not re-arm the trap. I_FIRST_OUT remains cleared
until the trap occurs again.
The unlatched I_L_OUT_Dn parameters remain False until
one or more I_OUT_D_n parameters transitions to True and for which the
I_RESET_REQD_n parameters are True.
|